1. Field of the Invention
The invention relates generally to the field of chip manufacturing process, and more particularly to a process for integrating germanium into a CMOS fabrication process.
2. Description of Related Art
The convergence of silicon and optical fabrication processes presents an attractive manufacturing solution by leveraging the use of a standard CMOS (complementary metal-oxide semiconductor) manufacturing process. Integration of germanium (Ge) in a CMOS process has been desired for a number of reasons. Firstly, Ge has a smaller bandgap and higher mobility than silicon. Secondly, Ge may be used as a growth template for III-IV compound semiconductors, such as GaAs. Thirdly, Ge may be used as a growth template for strained silicon materials.
Some optical companies have selected III-V semiconductors to provide high detection efficiency, but this selection poses difficult challenges in incorporating a III-V material in a standard CMOS technology. Challenges related to how to integrate germanium into CMOS may exist around how to contact the germanium and how to selectively grow the germanium in desired locations. For additional background information on Ge on Si structures, the reader is referred to “Metal-semiconductor-metal near-infrared light detector based on epitaxial Ge/Si”, by L. Colace et al. and G. Capellini et al., Applied Physics Letters, Vol. 72, No. 24, pp. 3175-3177.
Accordingly, there is a need for a method to integrate germanium into CMOS wafers in an efficient manner.